Many integrated circuit (IC) products require an adjustment, or trim, after the IC wafer has been completely fabricated. One such example might be a power regulator IC in which the output of a reference voltage generator, required to conform to a particular specification, may be affected by unavoidable manufacturing variations, and thus cannot be precisely determined until after the fabrication process is complete. In this case, the IC may include an array of elements coupled to the input terminals of a digital-to-analog (D/A) converter. Each of these elements may be programmed to one or the other of the logic voltage levels of the D/A converter, so as to generate the desired output voltage at its output terminal. Another such example might be an IC including an oscillator, wherein a post-fabrication trim of its output signal frequency is required.
In the past, these programmable arrays of elements have included zener diodes and polysilicon fuses. During final probe test of each IC die of a wafer, the trim process requires a large current to be applied through selective elements of the array, via probes contacting pads on the die, to permanently alter the states of the selected elements. In the case of an array of zener diodes, the current causes the diode to become a conductive path; in the case of an array of polysilicon fuses, the current causes the fuse to become an open circuit.
This arrangement suffers from several disadvantages. Probe contact pads are required for each element of the array, wasting valuable surface area of the die. Second, programming of the a-ray must occur during probe test, prior to the processes in which the die is packaged and encapsulated, which processes may induce physical stresses in the die which affect its circuit parameters. This prompts a further disadvantage that the trim must be done by the manufacturer, and cannot be performed by the end-user of the IC product. Fourth, both types of elements used in the abovementioned arrays have been known to revert, over time, to their previous state, thereby altering the trim value. Finally, and most significantly, once programmed, the arrays of diodes and fuses cannot be readjusted, making the test program trim routine complex, requiring the use of extrapolation techniques to determine a trim pattern. If the trim is incorrect or drifts out of specification during a later processing step in the IC fabrication, the device may have to be scrapped.
Integrated circuit products having Electrically Erasable Programmable Read-Only Memories (EEPROM's) have been used for many years. In most of these applications, the EEPROM has functioned as a storage medium, e.g., as a reconfigurable look-up table. More recently, however, new uses for EEPROM's have been developed including the trim features of an IC discussed earlier.
The use of an EEPROM to provide trim for an IC offers many advantages over the previously mentioned methods. Since it does not require a multiplicity of probe pads on the die surface, it takes up less area of the IC die and it requires, at most, only one additional lead external to the die. Additionally, aside from actual reprogramming, it does not tend to revert back to a previous state, as can be the case for zener diodes and polysilicon fuses. Finally, and perhaps most significantly, it offers the advantage of reprogrammability; it can be adjusted indefinitely until a satisfactory trim value is achieved.
This reprogrammability feature, however, can be a disadvantage under certain circumstances. It has been recognized that if the EEPROM device can be programmed after encapsulation to provide the proper trim, then it can also be inadvertently reprogrammed to some unwanted value by the end-user. In some cases, where the manufacturer determines the trim adjustment, it is desired to keep the end-user from altering this adjustment. In other cases, it is the end-user who makes the adjustment, but desires that once the adjustment is made, it cannot be reprogrammed.
In the prior art, an external "program enable" lead has been provided which is then tied off to some reference potential when the IC is mounted on a circuit board, thereby disabling the programming function of the EEPROM. This arrangement, however, is not foolproof, and the possibility of inadvertent reprogramming of the EEPROM always exists.
In view of the above, it is clear that there exists a need for an improved apparatus for providing IC trim which incorporates the many advantages of an EEPROM, but which permanently disables its programming function once a satisfactory trim value has been achieved.